_______
ADW: Ошибка: Undefined index: HTTP_ACCEPT_LANGUAGE
PC-3000 flash

  KuttingEdge   
845
  GreyDKang   
565
  Karol   
397
  l32   
337
  vip   
328




TOTAL

DOWNLOADED
 
Main → SSS → SSS6698 → SSS6698
TASK INFO:  ( GreyDKang )
Flash device type :  USB Flash
Controller marking :  SSS6698
Number of memory chips :  2
Number of parts :  1
Memory chip marking :  TC58NVG6DCJTA00
Memory chip ID :  0x98DE8493
Capacity(Mb) :  16384


SOLUTIONS:
  • Variant 1: (26.06.2014)    Author: GreyDKang [565]

Results of preparation:
0
1
Initial memory chips (2)
0
1
Page XOR transformation (ID_XOR 544)
0
1
Page size transformation
0
Join by dump
0
Cut Sectors from Block

Algorithm of analysis:
0
Building Image based on data analisys
8064
4096

Solution file:

Solution rating:
65



  • Variant 2: (04.02.2016)    Author: fordin [3]

Results of preparation:
0
1
Initial memory chips (2)
0
1
Page XOR transformation (ID_XOR 531)
0
1
Page size transformation
0
Join by dump
0
Cut Sectors from Block

Algorithm of analysis:
0
Building Image based on data analisys
8064
4096

Solution file:

Solution rating:
8



  • Variant 3: (04.02.2016)    Author: fordin [3]

Results of preparation:
0
1
Initial memory chips (2)
0
1
Page XOR transformation (ID_XOR 531)
0
1
Page size transformation
0
Join by dump
0
Cut Sectors from Block

Algorithm of analysis:
0
Building Image based on data analisys
8064
4096

Solution file:

Solution rating:
7



  • Variant 4: (16.05.2019)    Author: dimepi2910 [1]

Results of preparation:
0
1
Initial memory chips (2)
0
1
Page XOR transformation (ID_XOR 531)
0
1
Page size transformation
0
Join by dump
0
Cut Sectors from Block

Algorithm of analysis:
0
Building Image based on data analisys
8064
4096

Solution file:

Solution rating:
5



  • Variant 5: (26.01.2018)    Author: victorcurdoglo [1]

Results of preparation:
0
1
Initial memory chips (2)
0
1
Page XOR transformation (ID_XOR 531)
0
1
Page size transformation
0
Join by dump
0
Cut Sectors from Block

Algorithm of analysis:
0
Building Image based on data analisys
8064
4096

Solution file:

Solution rating:
3



  • Variant 6: (04.02.2016)    Author: fordin [3]

Results of preparation:
0
1
Initial memory chips (2)
0
1
Page XOR transformation (ID_XOR 531)
0
1
Page size transformation
0
Join by dump
0
Cut Sectors from Block

Algorithm of analysis:
0
Building Image based on data analisys
8064
4096

Solution file:

Solution rating:
1



  • Variant 7: (31.03.2022)    Author: FBS_34 [2]

Results of preparation:
0
1
Initial memory chips (2)
0
1
Page XOR transformation (ID_XOR 531)
0
1
Page size transformation
0
Join by dump
0
Cut Sectors from Block

Algorithm of analysis:
0
Building Image based on data analisys
8064
4096

Solution file:

Solution rating:
0



  • Variant 8: (31.03.2022)    Author: FBS_34 [2]

Results of preparation:
0
1
Initial memory chips (2)
0
1
Page XOR transformation (ID_XOR 531)
0
1
Page size transformation
0
Join by dump
0
Cut Sectors from Block

Algorithm of analysis:
0
Building Image based on data analisys
8064
4096

Solution file:

Solution rating:
0



1 | 2 | 3 | 4


Flash device type:     
Controller marking:
Number of memory chips:     
Number of parts:     
Memory chip marking:
Memory chip ID:
Capacity(Mb):


© Copyright 2009-2014 ACE Lab ®    www.acelab.eu.com ACE Lab